Lecture 10: Comprehensive Revision (Digital Engineering Full Syllabus)

1. Introduction and Number Systems

• Analog vs. Digital: Analog systems process continuous values. Digital systems handle discrete values, primarily binary (0 and 1).
• Hardware vs. Software: Hardware consists of circuits that execute commands, while software consists of programs that control the hardware.
• Number Systems:
  • Decimal (Base 10): Uses digits 0-9.
  • Binary (Base 2): Uses digits 0 and 1.
  • Octal (Base 8): Uses digits 0-7.
  • Hexadecimal (Base 16): Uses digits 0-9 and letters A-F (where A=10, B=11, ..., F=15).
• Conversions:
  • Decimal to Binary: Repeatedly divide the decimal number by 2 and record the remainders from bottom to top.
  • Binary to Decimal: Multiply each bit by its positional weight ($2^n$) and sum the results.
  • Hexadecimal to Decimal: Multiply each digit/letter by its weight ($16^n$) and sum (e.g., AA = $10 \times 16^1 + 10 \times 16^0 = 170$).

2. Logic Gates and Boolean Algebra

• Basic Gates:
  • NOT (Inverter): Output is the opposite of input ($X = \bar{A}$).
  • AND: Output is 1 only if all inputs are 1 ($X = A \cdot B$).
  • OR: Output is 1 if at least one input is 1 ($X = A + B$).
• Derived Gates:
  • NAND/NOR: Universal gates; NAND is AND+NOT, NOR is OR+NOT.
  • XOR (Exclusive OR): Output is 1 if inputs are different.
  • XNOR: Output is 1 if inputs are the same.
• Boolean Identities:
  • Identity: $X+0=X$, $X \cdot 1=X$.
  • Null: $X+1=1$, $X \cdot 0=0$.
  • Complementarity: $X+\bar{X}=1$, $X \cdot \bar{X}=0$.
  • Idempotent: $X+X=X$, $X \cdot X=X$.

3. Design Process and Canonical Forms

• Design Steps: Word Description → Input determination → Truth Table → Equation → Implementation.
• Truth Table: Shows all $2^n$ combinations of inputs and their outputs.
• Canonical Forms:
  • Minterms (Sum of Products - SOP): Logical OR of minterms (where output is 1). Variable=1 is normal ($A$), Variable=0 is prime ($\bar{A}$).
  • Maxterms (Product of Sums - POS): Logical AND of maxterms (where output is 0). Variable=0 is normal ($A$), Variable=1 is prime ($\bar{A}$).
  • Notation: SOP uses $\sum m(indices)$, POS uses $\prod M(indices)$.

4. Circuit Minimization and K-Maps

• DeMorgan's Laws: $\overline{A+B} = \bar{A} \cdot \bar{B}$ and $\overline{A \cdot B} = \bar{A} + \bar{B}$ (Break the bar, change the sign).
• Algebraic Minimization: Using rules like $XY + X\bar{Y} = X$ and Absorption $X + XY = X$ to reduce gate count.
• Karnaugh Maps (K-Maps):
  • Graphical tool used for simplifying functions (3 variables = 8 cells).
  • Uses Gray Code adjacency (00, 01, 11, 10).
  • Grouping: Groups must be powers of 2 (1, 2, 4, 8). Larger groups provide simpler terms.

5. Combinational Circuits

• Binary Decoders: Converts $n$ binary inputs to $2^n$ unique outputs. Only one output is active at a time.
• Arithmetic Circuits:
  • Half Adder: Adds 2 bits, produces Sum and Carry.
  • Full Adder: Adds 3 bits (includes Carry-in).
• Multiplexer (MUX): Selects one of many inputs to a single output using select lines.
• De-Multiplexer (DEMUX): Distributes one input to many outputs.

6. Sequential Circuits

• Latches (Asynchronous): Output depends on current inputs and previous states. S-R Latch: S=1/R=0 (Set), S=0/R=1 (Reset), S=0/R=0 (Memory), S=1/R=1 (Invalid).
• Flip-Flops (Synchronous): Triggered by a Clock signal.
  • JK Flip-Flop: J=1/K=1 causes output to Toggle.
• Binary Counters: Built from flip-flops; each flip-flop represents 1 bit. Increments on each clock pulse.